Asynchronous Data Communication Mechanisms
1. Name of the event: Asynchronous Data Communication Mechanisms
2. Type of the event: Tutorial
3. Number of hours or days: 3 hours
4. Date: August 31, 2004
5. Frequency: one-time event (associated
with DSD'2004 Euromicro Symposium)
6. Venue: Rennes, France
7. Target audience: university research
and teaching staff, PhD. and M.Sc. students, industrial R&D, system designers
8. Prerequisites (expected knowledge and experience of participants):
BSc./MSc. in electrical/computer engineering
or a related discipline, basic knowledge of system design
9. Character of the event: International,
open
10. Registration fee: 50 EURO (includes
participation in full REASON tutorial day at DSD'2004).
11. Are travel grants available ? Yes,
click here to download application form.
12. Language of the event: English
13. Number of participants: max. 50.
14. Brief description of the programme of the event:
Asynchronous
communication mechanisms (ACMs) have been investigated since the 1980s
and have by now developed into a coherent field including
classification, specification, and techniques for implementation,
analysis and verification. ACMs are potentially useful in systems with
heterogeneous timing as data connectors between processes belonging to
different timing domains, which may exist either out of necessity or
desirability. They can also be useful as digital mimics for various
types of data connections in analogue systems, with different types of
ACMs suiting different data requirements. The expansion of ACM
classification to include several types of ACMs providing more
qualitative asynchrony and richer data properties than the traditional
FIFO buffer made clear that these applications can be envisaged, and
the successful work in synthesis and verification of implementations
made them practical.
In truly distributed systems such as sensor networks, there is often a
desire to have temporal decoupling of various kinds between digital
processes. For instance, parts of a distributed control system may
consist of control laws mapped onto hardware embedded into parts of the
plant, whilst the higher hierarchies of the system may be implemented
with software running in general purpose processors which are shared
multitasking units. It may be very important to have temporal
decoupling between these two parts of the control algorithm at the
hardware level because such reasons as avoiding deadlock propagation
through the system, the desire to have low power characteristics in
remote and battery powered units, the physical impossibility of keeping
everything synchronized in distributed systems, etc.
In highly integrated systems such as networked computers on chip,
systems on chip or networks on chip, the cost of maintaining global
synchrony may soon outweigh its benefits. For instance, the energy
consumption or EMI leakage related to a global clock might be deemed
very undesirable for particular systems. Simply transplanting the
current technology and techniques used in traditional digital networks
onto an on chip situation, although desirable as a quick solution, also
has its disadvantages. The various means employed by traditional
digital networks to deal with asynchrony, for instance, may prove to be
too complicated for low level hardware on-chip solutions. ACMs, on the
other hand, can be directly implemented in small-size (tens or hundreds
of gates) hardware, can provide all types of qualitative asynchrony
between communicating processes, and can be designed to suit any
quantitative asynchrony requirements. A shared-memory fabric based on
ACMs between physically close processing elements can enhance the
performance of on chip networks by providing a considerably richer set
of data communication options.
The purpose of this tutorial is to introduce the concept of ACMs to a
wider audience. It aims to describe ACM classification and
specification, and the techniques so far developed for ACM
implementation, synthesis, analysis and verification. By solving the
practical problems encountered during the process it will also help
introduce and reinforce certain knowledge, tools and skills needed to
deal with discrete event systems. For instance, emphasis will be put on
Petri nets and techniques and tools related to them.
Contents:
1. Asynchrony in data communications
2. ACM classification and specifications
3. ACM synthesis
4. ACM analysis and verification
5. Modelling ACMs at different levels
6. ACMs in distributed systems, modelling and simulations
7. ACMs in networks on chip, shared memory fabric
Registration: http://www.euromicro.org/registration/registration.php?event=Rtut2004
Accommodation: http://euromicro2004.ifsic.univ-rennes1.fr/
General information: Prof.
Lech Jozwiak
Last updated: April 30, 2004