1. Name of the event: Re-Configurable Systems
2. Type of the event: Tutorial
3. Number of hours or days: 3 hours
4. Date: August 31, 2004
5. Frequency: one-time event (associated
with DSD'2004 Euromicro Symposium)
6. Venue: Rennes, France
7. Target audience: university research
and teaching staff, PhD. and M.Sc. students, industrial R&D, system designers
8. Prerequisites (expected knowledge and experience of participants):
BSc./MSc. in electrical/computer engineering
or a related discipline, basic knowledge of system design
9. Character of the event: International,
open
10. Registration fee: 50 EURO (includes
participation in full REASON tutorial day at DSD'2004).
11. Are travel grants available ? Yes,
click here to download application form.
12. Language of the event: English
13. Number of participants: max. 50.
14. Brief description of the programme of the event:
Reconfigurable systems fill the flexibility, performance and power dissipation gap between the application specific systems implemented with hard-wired ASICs and systems based on the standard programmable micro-processors. During the last decade, due to the progress in microelectronic technology, and specifically availability of the system-on-chip technology, they evolved from a cost effective replacement for ASICs and other hard-wired system implementations in low-volume production series, prototyping and emulation, to the mainstream custom computation and embedded system products in such fields as telecommunication, image processing, video processing, multimedia, DSP, cryptography, embedded control etc., and to the main R&D topic of primary practical importance.
The re-configurable systems can represent either re-configurable
hardware or re-configurable hardware/software solutions (e.g. can
involve programmable co-processors or instruction set accelerators).
Since in both cases their base is a re-configurable hardware, they
enable extensive exploitation of the computing-in-space paradigm
(versus computing-in-time paradigm used in the traditional sequential
"von Neumann-type" processors). This feature, combined with the ability
of efficient implementation of the application or program specific
operations directly in the re-configurable hardware, enables a very
effective and efficient exploitation of various sorts of parallelism.
The re-configurable systems are thus very well suited to implementation
of various data stream applications.
The main implementation technology of the (re-)configurable hardware is the field programmable logic technology: FPGAs and CPLDs. To efficiently develop, implement and use the re-configurable systems, adequate computer-aided support tools are necessary. A typical programming and re-configuration environment involves a compiler (being able to perform an adequate hardware/software partitioning and to generate both the software code and re-configurable hardware description), circuit synthesis tools (being able to synthesize the re-configurable hardware) and hardware mapping, placement, routing, and programming tools.
The main subjects of the tutorial involve the characterization of
the re-configurable systems, discussion of their various architectures
and introduction to the fabric-based systems and their support tools.
Registration: http://www.euromicro.org/registration/registration.php?event=Rtut2004
Accommodation: http://euromicro2004.ifsic.univ-rennes1.fr/
General information: Prof. Lech Jozwiak
Last updated: April 30, 2004